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- Hands-on design experience in Ring Oscillators, Dividers, Bias blocks (voltage & current references), high-speed custom digital in lower FINFET technology nodes.
- Independently guide layout engineer & run PEx Simulations.
- Experience in PERC, EM & IR Flows, Reliability checks, Co-Simulations of Analog + Digital (RTL)
- Debug functional and performance issues in simulations
- Flexible to take different tasks in project
- Design implementation to meet PPA goals.
- Create and check all relevant design views using sign-off tools.
- Documentation as per requirement years in any of the spice simulators (Hspice / Spectre preferred) working in Cadence Virtuoso environment.)
Analog Circuit Design Engineer - Hyderabad, India - Kaizen
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