Smita Mukherjee

Graduate in Electronics & Communication Engineering with IRSE Signalling Designer License, having expertise in the field of Railway Signalling and Telecommunication Systems, Designing & Verification.
▪ Good Experienced in the Design of RRI Indoor cum wiring diagrams
▪ Lead of the Application Logic Design (Microlok-II) team involved in the designs of stations having 300+ routes.
▪ Well versed with System configuration, Indoor & Outdoor Interface, and Communication Circuit Design & Verification for solid‐state interlocking controllers and way‐side equipment.
▪ Skilled in system engineering for the deployment of CBTC solutions in Metro projects. Strong knowledge of Automatic train control (CBTC)
▪ Good Knowledge and experience in the Design & Verification of Signal Interlocking Plan (SIP), Cable Core Plan (CCP), Station Working Rule Diagram (SWRD), Bonding & Earthing Plan (BEP), and Route Control Table (CT) Design & Verification.
▪ Good Knowledge and experience in preparation of vital and non‐vital application logic data for yards having 300+ routes, and communication between interlocking systems.
▪ Involved in the Design & Verification of Aspect Sequence Charts, Level Crossing Control Layout & Chart (LX Warning circuits).
▪ Hand-on experience in Factory Acceptance Test (FAT) & Site acceptance testing (SAT) errors troubleshooting.

▪ Graduate in Electronics & Communication Engineering with IRSE Signalling Designer License, having expertise in Railway Signalling and Telecommunication Systems, Designing & Verification.
▪ Good Experienced in the Design of RRI Indoor cum wiring diagrams
▪ Lead of the Application Logic Design (Microlok-II) team involved in designing stations with 300+ routes.
▪ Well versed with System configuration, Indoor & Outdoor Interface, and Communication Circuit Design & Verification for solid‐state interlocking controllers and way‐side equipment.
▪ Skilled in system engineering for the deployment of CBTC solutions in Metro projects. Strong knowledge of Automatic train control (CBTC)
▪ Good Knowledge and experience in the Design & Verification of Signal Interlocking Plan (SIP), Cable Core Plan (CCP), Station Working Rule Diagram (SWRD), Bonding & Earthing Plan (BEP), and Route Control Table (CT) Design & Verification.
▪ Good Knowledge and experience in preparation of vital and non‐vital application logic data for yards having 300+ routes, and communication between interlocking systems.
▪ Involved in the Design & Verification of Aspect Sequence Charts, Level Crossing Control Layout & Chart (LX Warning circuits).
▪ Hand-on experience in Factory Acceptance Test (FAT) & Site acceptance testing (SAT) errors troubleshooting.
▪ Preparation of BOQ (Bill of Quantity/Material) Estimation for Stations, Yards, and Automatic Block Sections.
▪ Have experience in working with private sidings (Construction and Engineering).
 Excellent problem-handling, and decision making capabilities coupled with good communication and interpersonal skills.

• B.Tech in Electronics & Communication Engineering from West Bengal University of Technology, in 2012 with 8.08 CGPA • Indian School Certificate(Class XII) –Auxilium Convent, Bandel in 2008 with 88% • Indian Certificate of Secondary Education (Class X) – St. Helen’s Convent, Darjeeling in 2006 with 86%