Tushar Tripathi

A B.Tech student in ECE (Biomedical) at VIT Vellore (CGPA 8.1), with prior education from Don Bosco and G.D. Goenka schools. He interned at MNNIT, optimizing CP-DR antennas using Ansys HFSS, and at Maven Silicon, developing a RISC-V RV32I processor in Verilog HDL.

• As a Project Intern at MNNIT, I worked on CP-DR antennas for millimeter-wave frequencies using Ansys HFSS, focusing on optimization, simulation, and achieving high performance.
• As a VLSI Design Intern at Maven Silicon, I developed a RISC-V RV32I processor architecture in Verilog HDL, focusing on pipelining and control units.

• I'm pursuing a B.Tech in Electronics and Communications Engineering with a specialization in Biomedical at VIT Vellore, holding a CGPA of 8.1