Veera Kanmani S V
Engineering / Architecture
About Veera Kanmani S V:
Expertise in SV, UVM and verification
- Working as verification engineer for 6+years of experience in semiconductor industry
Experience
Expertise in SV, UVM and verification
- Working as verification engineer for 6+years of experience in semiconductor industry
Education
B.E - electronics and communication engineering (2012-2016)
M.E - communication systems (2016-2018)
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Smart Soc Solutions Bengaluru, HyderabadWe are looking for an experienced Design Verification Engineer to join our high-performance VLSI/SoC verification team. · The ideal candidate will have strong expertise in SystemVerilog and UVM with hands-on experience verifying complex IPs and SoCs involving industry-standard pr ...