Vineela Janga

Dear Sir /Madam

     My self Janga Vineela .Now I am pursuing year B.TECH Final year in RGUKT SKLM.

My Project is  Design a real time aquarium water level monitoring using Quartus prime

Another one is simulated and verified functionality on XILINIX VIVADO. I did summer internship in sense semiconductors &IT Solutions. My Certifications are 

I got NPTEL certificate on VLSI Physical Design with Timing Analysis.

My Internship Certificate is FPGA Design using Verilog.

I hereby declare that the above information is true to the best of my knowledge.

I Am a FRESHER Student .

I didn't have any experience in companies

I Completed my schooling in ZPHS Government school.

10th cgpa :9.7

I Completed my inter in RGUKT SKLM.

Inter cgpa:8.2

Now I am pursuing b.tech final year (7thsem) in RGUKT SKLM.

cgpa:7.5