Proxelera Jobs in India

Job Description: · Solid experience in Design Verification using SystemVerilog & UVM. · Hands-on Testbench development experience (scoreboard, drivers, sequencers, checkers, agents) · Experience in IP-level or SoC/Sub-system level verification. · Good understanding of protocol-ba ...

We are looking for a highly skilled Analog Design Engineer with 5-10 years of experience in high-speed I/O circuit design to develop robust, high-performance analog and mixed-signal IPs. · The candidate will play a key role in the architecture, design, simulation, and silicon val ...

+Job summary · Búsqueda de un ingeniero senior en verificación de diseño ASIC responsable del desarrollo de testbenches escalables UVM. +Architect and build scalable UVM testbenches from scratch at subsystem and SoC level. · Own testbench architecture: structure, reuse, scalabili ...

SoC/Sub-System Verification Engineer · We are looking for an experienced Verification Engineer with strong hands-on expertise in SOC/sub-system level verification using UPF. · Work on verification of full-chip SOC's or sub-systems with a primary focus on UPF-based verification. · ...

About the role: · This is an opportunity to work on complex projects at Proxelera in Bengaluru, India. The ideal candidate will have experience designing ASICs from scratch using System Verilog and Verilog languages. · Designing efficient hardware architectures that meet power, p ...

Proxelera is expanding its design verification team and seeking passionate verification engineers to work on cutting-edge SoC and ASIC designs. · We are looking for experienced professionals with 8-15 years of experience in leading or managing large-scale ASIC (SoC & Large Subsys ...

We are hiring a hands-on ASIC RTL engineer with strong RTL coding skills who owns micro-architecture and RTL development from spec to silicon. · Define and own micro-architecture · Write, review, and own high-quality synthesizable RTL code in SystemVerilog / Verilog · Build and i ...

We are hiring a Design Engineer to work on cutting edge projects. · Own complete RTL design for complex SoC or major subsystem blocks—from micro‑architecture to tape out and silicon bring‑up. · ...

+ Bring a chip to market faster, smoother and dramatically more predictable at Proxelera · + MIPI CSI/DSI/C-PHY/D-PHY/UniPro verification experience required · + UVM/SystemVerilog-based verification skills needed · + HSIO interfaces such as PCIe USB UFS knowledge required ...

Design custom logic gates for Analog Mixed Signal macros. · Create cells for full custom high speed digital logic. · ...

This role sits between pure RTL ownership and smart integration.We need someone who can code real blocks and still understand how things connect.If you've built RTL and not just wired it, · read on · ...

Lead Design Verification Engineer · We are hiring a hands-on SOC verification engineer. · Create and own end-to-end verification plans · Develop modular UVM testbench architecture including agents, scoreboard, Drivers, sequencers and Monitors · The ideal candidate should have 8+ ...

Proxelera is India's premium chip and system software product engineering partner. · ...

About Proxelera · Proxelera is India's premier chip and system software product engineering partner. · We have a deep understanding of all aspects of product engineering – design planning stage to post silicon work. · ...

We are seeking an Analog Design Engineer with strong hands-on experience in analog circuit design and simulation, · Analog circuit design and simulations to validate functionality, performance, and reliability · ...

We are seeking an experienced Physical Design (PD) Engineer with 8+ years of hands-on ASIC implementation experience. · ...

About Proxelera: Proxelera is India's premium chip and system software product engineering partner. · We understand the challenges of all aspects of product engineering – right from design planning stage to post silicon work. · ...

A detail-oriented Test Timing Engineer with strong analytical skills and deep understanding of timing constraints is required to collaborate effectively with cross-functional teams. · ...

The ASIC Design Verification Engineer will collaborate with architects and design engineers to understand new CPU features to be verified. The role includes building test plan documentation and developing directed and random verification tests. · ...

Low-Power SoC DV Engineer · Catch low-power bugs before silicon does by verifying SoCs and subsystems with UPF, creating static and dynamic test scenarios, running Spyglass checks, debugging power-intent issues using waveform tools, and driving coverage closure. · Strong SoC Desi ...