Frond End Design- STA Engineer - Bengaluru, Karnataka

We are hiring an STA Engineer with strong expertise in timing analysis and closure across block and full-chip levels. · ...

We are looking for a highly skilled Static Timing Analysis (STA) Engineer to join our ASIC/SoC design team. · ...

Job summaryHands-on experience in ASIC timing constraints generation and timing closure · Expertise and advanced knowledge of industry standard timing EDA tools (Tempus preferred) · Deep understanding and experience in timing closure of various functional and test modes · Experti ...

We are seeking a highly motivated Static Timing Analysis STA Engineer with 3+ years of experience in VLSI Physical Design and timing closure. · Perform Static Timing Analysis STA at block and full-chip level · Drive timing closure for setup/hold violations · ...

STA Engineer position in Bangalore requires strong experience with Tempus/PrimeTime/Tweaker/DMSA (PTECO), expertise in timing corners/modes/process variations/signal integrity. · ...

This is a full-time hybrid role for an STA Engineer specializing in Synopsys PrimeTime, Timing Closure, and ASIC/VLSI. · ...

We are hiring STA Engineers with strong experience in ASIC timing closure and signoff activities. Immediate joiners preferred. · Expertise in Tempus · Strong understanding of signal integrity · ...

THE ROLE: · As a Silicon Design Engineer, you will work with formal experts and designers to verify formal properties and drive convergence . · THE PERSON: · You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team ...

Overview: · The STA (Static Timing Analysis) Engineer plays a crucial role in ensuring the timing closure of digital designs, making certain that the design meets functional and timing requirements. · Role: STA Engineer · Experience: 5+ Years · Location: Bangalore · Required Skil ...

We are seeking a highly motivated Static Timing Analysis (STA) Engineer with experience in VLSI Physical Design and timing closure. · Perform Static Timing Analysis (STA) at block and full-chip level · Drive timing closure for setup/hold violations · ...

STA engineer with experience in Tempus / PrimeTime / Tweaker / DMSA required. · ...

We are known for our extraordinary people who make the impossible possible every day. Questians are driven by hunger, humility, and aspiration. · We believe that our company culture is the key to our ability to make a true difference in every industry we reach. Our teams regularl ...

As an STA Engineer you will be responsible for timing closure and verification of complex ASIC or SoC designs. · ...

As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify and test electronic systems. · ...

As a Qualcomm Hardware Engineer you will plan design optimize verify and test electronic systems bring-up yield circuits mechanical systems Digital/Analog/RF/optical systems equipment and packaging test systems FPGA and/or DSP systems that launch cutting-edge world class products ...

We are looking for an experienced STA Engineer with strong hands-on expertise in Synopsys PrimeTime & PT-ECO for block-level timing analysis and closure. · ...

Skill: STA & Synthesis with 3+ yrs experience. · ...

We are looking for candidates with 5+ years of experience in Subsystem Static Timing Analysis (STA), having strong hands-on expertise in PrimeTime (PT Tool) and timing signoff activities. The ideal candidate should possess solid experience in subsystem-level STA. · Timing closure ...

We are seeking an exceptional STA Engineer to take a key role in our semiconductor design team. · Responsible for leading a team of STA engineers and close high frequency lower tech node complex designs. · Understand Design Architecture and timing requirements · ...

STA engineer responsible for multi voltage domain STA environment setup execution and timing closure of GPU. · Multi Voltage domain STA environment setup execution and timing closure of GPU · Pre-route timing checks QoR clean up to eliminate SDC issues ensure quality handoff for ...

This is a full-time on-site role for an STA Static Timing Analysis Engineer The STA Engineer will be responsible for performing static timing analysis collaborating with cross-functional teams to resolve design timing issues and implementing timing closure techniques the engineer ...