STA Engineer - Bengaluru - MediaTek

As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify and test electronic systems. · ...

+We are looking for an experienced STA VLSI Engineer to join our growing semiconductor team in Bangalore. · +Perform full-chip and block-level Static Timing Analysis (STA) · Setup and analyze timing constraints (SDC) including clocks, I/O constraints, exceptions · +4 to 10 years ...

Skill: STA & Synthesis with 3+ yrs experience. · ...

We are looking for a STA Engineer with strong experience in Tempus/PrimeTime/Tweaker/DMSA (PTECO) and expertise in timing corners, modes, process variations and signal integrity. · ...

+ Perform full-chip and block-level Static Timing Analysis (STA) · + Setup and analyze timing constraints (SDC) including clocks, I/O constraints exceptions · + Work closely with PD RTL synthesis teams to resolve timing issues · Job Title: STA (Static Timing Analysis) Engineer – ...

STA engineer responsible for multi voltage domain STA environment setup execution and timing closure of GPU. · Multi Voltage domain STA environment setup execution and timing closure of GPU · Pre-route timing checks QoR clean up to eliminate SDC issues ensure quality handoff for ...

**Static Timing Analysis (STA) Engineer Job Overview** · Perform Static Timing Analysis (setup, hold, recovery, removal) across all PVT corners and modes. · ...

Skill: STA & Synthesis · Years of Experience : 3+ yrs · Location : Bangalore ...

We are hiring an STA Engineer with strong expertise in timing analysis and closure across block and full-chip levels. · ...

+Job Summary · We are looking for a skilled and motivated STA Engineer to join our backend implementation team. · +STA Engineer with 5+ years · Timing closure fundamentals · Constraint creation and maintenance exposure · DFT modes in STA timing closure · ...

Sr STA Engineer Job Description · We're looking for an experienced Static Timing Analysis (STA) Engineer with strong expertise in constraint generation to join our VLSI team. · Perform full-chip and block-level Static Timing Analysis · Develop and validate SDC constraints (clocks ...

We are seeking an exceptional STA Engineer to take a key role in our semiconductor design team. · Responsible for leading a team of STA engineers and close high frequency lower tech node complex designs. · Understand Design Architecture and timing requirements · ...

This is a full-time on-site role for an STA Static Timing Analysis Engineer The STA Engineer will be responsible for performing static timing analysis collaborating with cross-functional teams to resolve design timing issues and implementing timing closure techniques the engineer ...

STA engineer with experience in Tempus / PrimeTime / Tweaker / DMSA required. · ...

STA Engineer position in Bangalore requires strong experience with Tempus/PrimeTime/Tweaker/DMSA (PTECO), expertise in timing corners/modes/process variations/signal integrity. · ...

We are looking for an experienced STA VLSI · Engineer to join our growing semiconductor team in Bangalore.Perform full-chip and block-level Static Timing Analysis (STA) · Setup and analyze timing constraints (SDC) including clocks, I/O constraints exceptions · Perform timing clo ...

As a silicon design engineer, work with formal experts and designers to verify formal properties and drive convergence. · ...

We are looking for a highly skilled Static Timing Analysis (STA) Engineer to join our ASIC/SoC design team. · ...

As a Qualcomm Hardware Engineer you will plan design optimize verify and test electronic systems bring-up yield circuits mechanical systems Digital/Analog/RF/optical systems equipment and packaging test systems FPGA and/or DSP systems that launch cutting-edge world class products ...

Job summaryHands-on experience in ASIC timing constraints generation and timing closure · Expertise and advanced knowledge of industry standard timing EDA tools (Tempus preferred) · Deep understanding and experience in timing closure of various functional and test modes · Experti ...