RTL Engineer - Bengaluru

We are looking for a Senior ASIC Engineer to join our team in Bangalore or Hyderabad. · ...

+Job Summary · Proxelera is India's premium chip and system software product engineering partner. · +Responsibilities · Strong RTL coding in Verilog/SystemVerilog is non-negotiable. · ...

Proxelera is India's premium chip and system software product engineering partner. Our engineers take extreme passion in your assignments and deliver through their years of high quality experience to make your product successful. We understand the challenges of all aspects of pro ...

+Proxelera is India's premium chip and system software product engineering partner. · + · + · ...

We are looking for a skilled RTL Engineer to join our team at TECHSOC TECHNOLOGIES PRIVATE LIMITED. The ideal candidate will have a strong background in designing and developing digital circuits using Verilog/VHDL languages. · Roles and Responsibility · Design and develop high-qu ...

An RTL Engineer designs digital circuits by writing code in Hardware Description Languages (HDLs) like Verilog and SystemVerilog. They translate high-level specifications into a Register-Transfer-Level (RTL) model that describes data flow between registers and logic operations. · ...

You will play a key role in the design and integration of System-on-Chip (SoC) components. You'll work on RTL coding, verification flows and integration of IP blocks. · ...

Rtl engineer job at Quest Global with experience in RTL design from 7 to 10 years and FPGA porting or soc integration. · ...

As a SoC Integration Engineer you will play a key role in the design and integration of System-on-Chip components contributing to the development of high performance semiconductor solutions. · ...

This job is for an Engineer-RTL with experience in digital or mixed signal IC design. The candidate should have a B.A./B.S. in engineering, engineering management, or engineering operations and 5-7 years industry experience with BS working in digital or mixed signal IC design. · ...

This is a job that requires RTL design experience from 7 to 10 years. · ...

Rtl engineer with experience in rtl design from 7 to 10 years and knowledge of fpga porting or soc integration. Key responsibilities include designing rlt designs for companies. · RTL design experience from 7 to 10 years. · ...

Design and develop high-quality RTL code for various applications. · Optimize RTL code for performance, power efficiency, and scalability. · Collaborate with cross-functional teams to ensure successful SoC integration. · ...

TekWissen is a global workforce management provider throughout India and many other countries in the world. · ...

++Work on cutting-edge AI video processing silicon at Proxelera building high-performance ASICs that power next-generation edge intelligence. · ++Pure #RTLDevelopment (4 positions) · Real #RTLDevelopment experience · Strong hands-on #ASICRTLCoding (Verilog / SystemVerilog) · ...

We are looking for an experienced RTL Verification Engineer with a strong FPGA background to join our Bengaluru-based defense engineering team. · The role involves verification of mission- and safety-critical digital hardware used in defense, aerospace, and strategic electronic s ...

Job Title : RTL Design Engineer ASIC / SoC (AXI, STA, Synthesis) · Role Overview · Hiring experienced RTL Design Engineers for high-performance ASIC / SoC programs in networking and data communication domain. · Key Responsibilities · RTL design using Verilog / SystemVerilog · Mic ...

RTL DESIGN ENGINEER (Principal/Senior Staff/Staff Engineer) · 10 years to 15 years experience in RTL design in Verilog/SystemVerilog, micro-architecture integration & debug synthesis-friendly coding practices experience in ASIC SoC designs. · ...

+We are seeking a seasoned Senior RTL Design Engineer with strong expertise in microarchitecture definition and · RTL development.+ · +Define microarchitecture and implement RTL designs optimized for performance, power, · and area (PPA)+ · +Collaborate with software teams to su ...

We are looking for a strong RTL Design Engineer with hands-on experience in Verilog/System Verilog. · Own block-level RTL development from micro-architecture definition to clean, synthesizable RTL. · ...