Senior Principal Engineer – SerDes Firmware - Bengaluru

Lead firmware development for high-performance DSP/Serdes through the full product lifecycle. · Drive architecture and hands-on C coding. · Team leadership through the full product lifecycle. · ...

Job summary · Senior Principal Engineer – SERDES Firmware (DSP / Embedded Systems) · As a Senior Principal Engineer you will play a critical technical leadership role in bringing complex SERDES-based products from concept through volume production. · ResponsibilitiesOwn the archi ...

We are seeking a Senior Principal Engineer for Engineering Company to lead firmware development for complex, high-performance SerDes and DSP-based systems. This is a highly visible, hands-on leadership role where you will own firmware architecture, guide cross-functional teams, a ...

Job Description · Job Title – Embedded Firmware Engineer - Linux Networking · Experience: 10+Year(s) · Job Type: Full-time · Location: Hyderabad, India · Job Description · Embedded Firmware Engineer responsible for Ethernet driver development, firmware bring-up, and · low-level d ...

Senior Firmware Design Engineer · We Are: · At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP inte ...

ASIC Digital Design Sr Engineer · We Are: · At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP inte ...

Be part of the DDR PHY IP Front End Design team responsible for developing firmware for DDR5 PHY using microcontrollers. · ...

We have an opening for Senior Principal Engineer. The position requires · a Bachelors/Masters degree in CSE/ECE or related technical field(s) and 15+ years of experience in memory constrained embedded C/C++ FW development. ...

Be part of the DDR PHY IP Front End Design team responsible for developing firmware for DDR5 PHY using microcontrollers. · ...

Senior Firmware Design Engineer · We Are: · At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP inte ...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. · Be part of the Cadence Memory IP Group adn responsible for - · Developing firmware for DDR/LPDDR/GDDR/HBM PHY using microcontrollers · Responsible for developing firmwa ...

We are looking for a Senior Member of Technical Staff (SMTS) Engineer with an obsession for firmware. · ...

The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. · Cadence's employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities ...

ASIC Digital Design Sr Engineer · We Are: · At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP inte ...

Cadence IP solutions will change the way you think about and use IP in your system-on-chip (SoC) designs. As you use more IP to fortify your SoCs with new functionalities, we can help you reduce the complexity and risk inherent in designing for smart technology while meeting your ...

Be part of the Cadence DDR PHY IP Front End Design team responsible for developing firmware for DDR5 PHY using microcontrollers. · ...

+Job Summary · We are seeking a highly motivated digital design professional who thrives in collaborative environments. · +ResponsibilitiesDesigning bare metal firmware for mixed-signal ASICs. · Collaborating with analog teams on specifications and integration. · ...

Conduct pre- and post-layout signal integrity simulations on SerDes links >=56G, ideally 100G/200G PAM4, using tools like Sigrity, ADS, HFSS. Define PCB stack-ups for multi-hundred-Gbps interfaces on dense form-factor modules or line cards. · ...

We are looking for an MTS (Member of Technical Staff) Engineer with an obsession for firmware. · ...

Design Verification expertise I.ein System Verilog /UVM SOC / SUB-SYSTEM Processor Based Verification Experience in test planning and debugging complex designs Full silicon design lifecycle experience Strong background in developing UVM Testbenches for SOC/SUB-SYSTEM from scratch ...