DFT Engineer - Bengaluru, India - Kiash Solutions LLP

Description

Consdiering candidates wtih 4+ yrs of exp

Location - Pune / Bangalore / Hyderabad / Chennai /Indore / Ahmedabad

Position: Design for Testability (DFT) Engineer

Job Summary:

The DFT Engineer will be responsible for implementing design for testability techniques to enhance the testability and manufacturability of semiconductor integrated circuits. This role involves working closely with the design, verification, and testing teams to ensure the successful integration of DFT methodologies throughout the design process.

Key Responsibilities:

1. DFT Architecture and Strategy:

• Define and develop DFT architecture and strategies for complex semiconductor designs.
• Collaborate with design and verification teams to incorporate DFT requirements into the overall design flow.

1. Scan Chain Insertion:

• Implement and insert scan chains for efficient test pattern generation and fault coverage.
• Optimize scan chain configurations to minimize test application time and area overhead.

1. ATPG (Automatic Test Pattern Generation):

• Develop and apply ATPG techniques to automatically generate test patterns for various fault models.
• Ensure high fault coverage while minimizing test application time and area overhead.

1. Memory BIST (Built-In Self-Test):

• Implement memory BIST techniques for testing embedded memories within the semiconductor design.
• Optimize BIST configurations for performance, area, and power considerations.

1. Logic BIST:

• Design and integrate logic BIST structures to enhance the testability of combinatorial logic.
• Optimize BIST configurations for efficient fault detection and test time.

1. Boundary Scan (IEEE 1149.1/JTAG):

• Implement and verify boundary scan structures for ease of testing and debugging.
• Ensure compliance with IEEE standards and facilitate external testing.

1. Analog/Mixed-Signal DFT:

• Collaborate with analog and mixed-signal design teams to implement DFT techniques for analog and mixed-signal blocks.
• Develop strategies for testing and diagnosing analog and mixed-signal circuitry.

1. Design Integration and Validation:

• Work closely with the design and verification teams to integrate DFT features seamlessly into the overall design.
• Validate DFT structures through simulations and ensure functionality in silicon.

1. Post-Silicon Test Support:

• Collaborate with post-silicon validation teams to address and debug DFT-related issues.
• Provide support for test program bring-up and production testing.

1. Documentation:

• Create comprehensive DFT documentation, including specifications, guidelines, and reports.
• Maintain clear and detailed records of DFT implementations for future reference.

1. Continuous Learning:

• Stay updated on industry trends, advancements in DFT methodologies, and emerging technologies.
• Actively participate in professional development activities to enhance skills and knowledge.

Qualifications:

• Bachelor's/Masters/Ph.D. in Electrical Engineering, Computer Engineering, or related field.
• Experience in DFT methodologies and tools.
• Proficiency in industry-standard EDA tools for DFT implementation.
• Strong understanding of semiconductor design principles and processes.
• Excellent communication and collaboration skills.