Design Verification - Banga Rural, India - Hiringlabs Business Solutions

Description

Requirement is for NOC DesignVerification which includes but not limited to Design verificationwith low power intent/upf uvm tb collaterals coding test/sequencedevelopment regressions/debugs coverage coding/analysis deliveringkey milestones as part of projectexecutions.1.

Handson experience in IP/Block levelverification.2.Hands on experience in Low PowerVerification/UPF.3.Experience in Clocking/Boot/ResetFlows.4. Experiencein System Verilog and UVM is amust.5. Experiencein ARM Protocols AXI AHB andCHI.6. Familiaritywith scripting languages like PerlPython.


RequiredEducation:

MTech/MS inElectronicsKeyWords:
SV UVM UPFARMRoles &Responsibilities:1.HW Design Verificationrole.2.Responsibility will be to own an IP block verification whichinvolves but not limitedtoa.
Test/Sequence/constraints coding test bench components codingassertions/checkers and coverage(functional code)closure.b. Runsimulations/regressions/cron debug andanalysis.
axi,ip,clocking,boot,universalverification methodology (uvm),design,scripting languages,armprotocols,components,design verification,closure,upf,python,systemverilog,uvm,code,assertions,low powerverification