- IP verification Using SV/UVM
- SOC Verification using C/SV
- VIP Integration
- Interconnect Protocols: AHB, AXI, APB
- SOC Interfaces: GPIO, SPI, I2C, UART (3+)
- High Speed Serial Interfaces: PCIe Gen 3/4 or USB or MIPI or CPU, ARM Processor
- Memory Interfaces: DDR or HBM I/O
- Coverage Closure: Code, Functional and Toggle
- Tools: Synopsys VCS or Cadence Incisive
- Technical Documentation: Testbench Specification, Test Plan Specification
- Good exposure to Scripting skills like Perl or Python or Shell or TCL .
Sr. Design Verification Engineer - Bengaluru, India - Tessolve Semiconductor Pvt. Ltd.
Description
Greetings From Tessolve Semiconductors.
A widely leading core semiconductor company in world wide.
We Are Hiring ..
Engineers who's having strong experience and eager to learn advanced Complete IP/SOC Front End Design techniques.
Position: Design Verification (Design /Sr. design Engineer/Design Lead /Sr. Design Lead/Manager/Sr. Managers)
Experience: 5 years to 25 years relevant experience.
Location - India and Onsite.
Technical Skillset Required:
Tessolve offers a highly competitive work environment to scale one's intellect, skills, creates an environment for people who thrive for success and grow with the organization's growth.
Tessolve has something unique to offer for everyone depending on their interest levels.
Interested Can share Resume with
Tessolve Semiconductors a venture of Hero Electronix, part of $5B Hero Group companies a Design and Test Engineering Service Company providing End to End Solutions from Product Engineering, Software, Hardware, Wireless, Automotive and Embedded Solutions. Currently we are 2300+ employees worldwide.
We are Global Multi- National Company having Engineering and Sales presences in India, Malaysia, Singapore, USA, UK, Europe, and China. Tessolve has strategic and sustainable growth plan to ensure the business stability to our valued customers and to protect the career of our employees even under disturbed Business situations.
To be successful in this role you will:
Seeking highly motivated, energetic, team-oriented Individual contributors willing to take the challenge of delivering the first pass success of complex IPs using the latest advanced verification languages and methodology.
The person would be working with experienced and motivated team of Designers and Verification resource and able to address the verification challenges in the context of the IP, SubSystem, and overall system, using simulation and formal verification and actively participate in supporting the debug at IP or SoC Level.
Disclaimer:
At Tessolve, we are committed to fostering a workplace that embraces and celebrates diversity in all its forms. We believe that diverse teams drive innovation, creativity, and success. We are dedicated to creating an inclusive environment where all employees, regardless of their race, colour, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status, feel valued and respected. We believe in fair and equitable treatment for all employees and aim to eliminate any biases or barriers that may hinder personal or professional growth.