Design & Verification Manager - System Verilog - Hyderabad, Telangana
3 weeks ago

Job description
, consectetur adipiscing elit. Nullam tempor vestibulum ex, eget consequat quam pellentesque vel. Etiam congue sed elit nec elementum. Morbi diam metus, rutrum id eleifend ac, porta in lectus. Sed scelerisque a augue et ornare.
Donec lacinia nisi nec odio ultricies imperdiet.
Morbi a dolor dignissim, tristique enim et, semper lacus. Morbi laoreet sollicitudin justo eget eleifend. Donec felis augue, accumsan in dapibus a, mattis sed ligula.
Vestibulum at aliquet erat. Curabitur rhoncus urna vitae quam suscipit
, at pulvinar turpis lacinia. Mauris magna sem, dignissim finibus fermentum ac, placerat at ex. Pellentesque aliquet, lorem pulvinar mollis ornare, orci turpis fermentum urna, non ullamcorper ligula enim a ante. Duis dolor est, consectetur ut sapien lacinia, tempor condimentum purus.
Access all high-level positions and get the job of your dreams.
Similar jobs
The DV Manager will lead end-to-end functional verification for complex IPs and SoCs. · ...
3 weeks ago
The DV Manager will lead end-to-end functional verification for complex IPs and SoCs. · The DV Manager will work closely with Architecture, RTL, Physical Design, DFT, and Program Management teams to ensure quality, schedule, and coverage goals are met. · ...
3 weeks ago
The core skill set expected from the team is exceptional Digital fundamenta · - lsHands on experience in System Design with FPGA devices with relevant FPGA EDA too · - lsExperience in designing and implementing FPGA based solutions in Microchip or Xilinx or Altera FPG. · s. · ...
1 month ago
Design Verification Engineer is responsible for verifying the functionality and performance of electronic circuits and systems. · ...
3 weeks ago
Emulation engineer with experience in emulation/prototyping using Cadence/Synopsys tool flows and solid understanding on SOC architecture and AXI protocol. · 4-5 years of experience in emulation/prototyping using Cadence/Synopsys tool flows (Palladium/Protium/HAPS/Zebu) · ...
3 weeks ago
FPGA Engineer required with strong digital design skills and knowledge of Xilinx Vivado IP & IPI tools. Proficiency in Linux environment and good communication skills required. · ...
3 weeks ago
· Company Description · Saira's Client · Job Description · Open Requirement only for PERSON WITH DISABLED · Role- Design Engineer · Experience- 0 to 2 years · Key skills- Firmware, Verilog, System Verilog and Digital Design · Location- Hyderabad · Types of Disability- Any disabi ...
1 day ago
The role involves expertise in FPGA debug and HW testing using ChipScope and board debug using Oscilloscope and power supplies. · ...
1 month ago
Fpga design engineer with expertise in digital logic design hands on fpga verification hw validation microsemi xilinx altera verilog system verilog vhdl expertise embedded fw programs using c c++ protocol knowledge axi ahb apb spi uart i2c usb serdes or protocol knowledge pci gen ...
1 week ago
We are hiring a Design Engineer to work on cutting edge projects. · Own complete RTL design for complex SoC or major subsystem blocks—from micro‑architecture to tape out and silicon bring‑up. · ...
1 month ago
The job is for an IP Verification Engineer in the semiconductor industry. · ...
3 weeks ago
We are seeking a highly skilled AMS Verification Engineer with 3+ years of experience to join team. · ...
1 month ago
Lead and manage a team of verification engineers across multiple projects. · Manage verification team deliverables, quality, schedules and resource allocation for concurrent projects. · ...
3 weeks ago
Job summaryLead verification engineers across multiple projects and manage deliverables for concurrent projects. · Track & report verification progress using quantitative metrics and coverage analysis. · ...
4 weeks ago
Design Verification · Exp- 5 to 12 Yrs · Location- Hyderabad/Bangalore · NP- 0 to 30 days max · Oversees definition, design, verification, and documentation for ASIC development. · Determines architecture design, logic design, and system simulation. Defines module interfaces/for ...
1 day ago
Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world's most highly integrated SoCs, Silicon Labs provides device makers the so ...
1 day ago
Design Verification · Exp- 5 to 12 Yrs · Location- Hyderabad/Bangalore · NP- 0 to 30 days max · Oversees definition, design, verification, and documentation for ASIC development. · Determines architecture design, logic design, and system simulation. Defines module interfaces/form ...
5 days ago
Job Description · SoC RTL Design Engineer with 8 – 12 years' experience · Expertise in writing RTL in Verilog and System Verilog · Experience in CPU Architecture based SoC design · Knowledge of ARM based bus protocols like CHI, AXI, AHB, APB, PCIe is must · Hands-on experience in ...
4 days ago
Job summary · We develop state-of-the-art AI processors on-chip high speed interconnects that deliver unmatched performance power efficiency and scalability to meet the demands of modern AI applications. · ResponsibilitiesDefine microarchitecture and write detailed design specifi ...
3 weeks ago
Technical Lead/ Staff Engineer: ASIC Design: RTL Architecture
Only for registered members
Cyient Semiconductor is looking for a Technical Lead / Staff Engineer – ASIC Digital Design to join our growing team in Hyderabad. · ...
1 month ago