No more applications are being accepted for this job
- Synthesis Static Timing Analysis and LEC of SoC/Cores
- Full chip and block level timing closure IObudgeting for blocks
- Logical equivalencecheck between RTL to Netlist and Netlist to Netlist
- Knowledge of lowpower techniques including clock gatingpower gating and MV designs
- ECO timing flow
- Proficient in scripting languages (TCL andPerl).
STASynthesis Staff - Sany, India - ConnectPro Consultant
Description
Exp 10 yrsJob Description:
TheCompany is looking for a STA and Synthesis Engineer who ispassionate in to work with crossfunctional engineering teams. Inthis position the engineer will be involved in all stages of thedesign and development cycles