Job title: RTL (ASIC) Design Engineer

Description

Highly Skilled Digital Circuit Designer

• We are seeking a highly skilled digital circuit designer with expertise in developing complex ASIC blocks and subsystems.

Main Responsibilities:

• Create, review, and maintain clock definitions I/O constraints false paths multicycle paths exceptions etc. for complex digital circuits;


• Design and develop Verilog/SystemVerilog code for various types of chips.

Key Skills & Qualifications

• Bachelor’s or Master's degree in Electrical Engineering or Computer Science;
• Familiarity with SDC constraints;
• Prior experience working with HDL languages like Verilog/SystemVerilog is required;< / ul >
  Bonus Points:​​ < ul st yle= " l ist-s tyle-typ e: d isc" >< li >K nowledge of system-level design methodologies; < /l i >/ u l >