Staff Engineer- DFT - Hyderabad / Secunderabad, Telangana - confidential

+Own and execute hierarchical scan insertion and ATPG flows for SoCs/MCUs. Integrate and verify MBIST at RTL level across various memory instances. · +Own and execute hierarchical scan insertion and ATPG flows for SoCs/MCUsEnable LBIST integration, RTL and gate-level coverage ana ...

Sr DFT Design Engineer: Implementation and verification of DFT features like SCAN, MBIST, LBIST and JTAG. · ...

Implement front-end from RTL to netlist including lint analysis timing constraints power analysis STA for multi-media IPs run logic physical synthesis generate optimized gate level netlist for timing area power debug timing area congestion issues work with RTL physical designers ...

The job involves leading post-silicon validation of complex SoCs and MCUs at the system level. · ...

The focus of this role is to execute the front end implementation of sub-blocks or IP. This involves ownership of synthesis, LEC, CLP, prelayout STA and postlayout STA/Timing closure. · Collaborate with designer and PNR teams to achieve closure. Execute as per schedule. Complete ...

This is a job for an ASIC Backend Developer in Hyderabad / Secunderabad, Telangana. · ...

We are looking for an experienced engineer to join the SOC Power Modeling team in the AMD Client Computing and Graphics group. · ...

We are looking for a technical leader to join and lead the SOC Power Modeling team in AMD Client Computing and Graphics group.This role involves collaboration with many engineering teams including SoC architecture definition IP design integration/physical design verification plat ...

Gather requirements for single or multiple projects and assist the team in understanding technical specifications. Design and develop electronic hardware systems for various applications. · Collaborate with cross-functional teams to define system requirements and specifications. ...