Physical Design - Bengaluru
2 weeks ago
Job summary
Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners Astera Labs enables organizations to unlock the full potential of modern AI.Qualifications
* Strong academic and technical background in electrical engineering* ≥7 years' experience supporting or developing complex SoC/silicon products for Server Storage and/or Networking applications* Hands-on and thorough knowledge of synthesis place and route CTS extraction timing analysis/STA Physical Verification and other backend tools methodologies for technologies 16nm or less preferably 7nm or less*Job description
, consectetur adipiscing elit. Nullam tempor vestibulum ex, eget consequat quam pellentesque vel. Etiam congue sed elit nec elementum. Morbi diam metus, rutrum id eleifend ac, porta in lectus. Sed scelerisque a augue et ornare.
Donec lacinia nisi nec odio ultricies imperdiet.
Morbi a dolor dignissim, tristique enim et, semper lacus. Morbi laoreet sollicitudin justo eget eleifend. Donec felis augue, accumsan in dapibus a, mattis sed ligula.
Vestibulum at aliquet erat. Curabitur rhoncus urna vitae quam suscipit
, at pulvinar turpis lacinia. Mauris magna sem, dignissim finibus fermentum ac, placerat at ex. Pellentesque aliquet, lorem pulvinar mollis ornare, orci turpis fermentum urna, non ullamcorper ligula enim a ante. Duis dolor est, consectetur ut sapien lacinia, tempor condimentum purus.
Access all high-level positions and get the job of your dreams.
Similar jobs
We are seeking a highly motivated · Physical Design Mid-Level Engineer · with 4–6 years of experience in ASIC/SoC physical design. · ...
2 days ago
The position involves working with a physical design team to deliver critical CPU units for AMDs next-generation processors. · ...
6 days ago
We are hiring Physical Design (PD) trained fresh graduates who are passionate about VLSI and semiconductor design. This opportunity is ideal for candidates who have completed Physical Design training from reputed VLSI institutes. · Support Physical Design activities across ASIC/S ...
6 days ago
The candidate will design blocks by handling complex block implementation. · Floorplan optimization for area power timing · ...
1 month ago
We are seeking an experienced Physical Design Lead to drive end-to-end physical design activities for ASIC projects. · ...
2 weeks ago
We are looking for an experienced Physical Design Mid Senior Level Engineer with 6–8 years of strong hands-on expertise in full-chip and block-level implementation. · Lead and execute physical design activities for ASIC/SoC projects from RTL to GDSII. · Drive floorplanning, place ...
2 days ago
We are seeking an experienced Physical Design Lead to drive end-to-end physical design activities for ASIC projects. · ...
2 weeks ago
As a Software Development Engineer you will engage in a dynamic work environment where you will analyze design code and test various components of application code across multiple clients. · ...
23 hours ago
The job involves physical design of blocks and handling complex block implementation. The candidate should have experience in RTL Synthesis for PnR using small geometry FinFET. · Physical Design of blocks & handle Complex block implementation. · ...
2 weeks ago
Physical Design Lead/BE Integration · This role requires an expert-level engineer with extensive hands-on experience in physical design implementation, RTL-to-GDS II at top level. · Key Responsibilities: · Expertise in hierarchical RTL2GDSII design implementation. · Pin assignmen ...
5 days ago
We are hiring · Fresh graduates who are passionate about VLSI and semiconductor design.This opportunity is ideal for candidates who have completed Physical Design training from reputed VLSI institutes and are eager to start their careers working on advanced ASIC/SoC implementati ...
1 week ago
We hire individuals with a strong sense of pride in their performance, team spirit, and a desire to excel. · Physical Design (PD) resource with min 4+ years of experience · ...
1 week ago
We are looking for an experienced Physical Design Mid Senior Level Engineer with 6–8 years of strong hands-on expertise in full-chip and block-level implementation. · ...
3 days ago
This role involves designing and implementing semiconductor systems developing analog layouts performing RTL design contributing to embedded systems designs Designing and implementing semiconductor systemsDeveloping analog layoutsPerforming RTL designContributing to embedded syst ...
1 month ago
We are seeking a highly motivated Physical Design Mid-Level Engineer with 4–6 years of experience in ASIC/SoC physical design.The candidate will be responsible for executing end-to-end physical design activities from RTL to GDSII, · ensuring high-quality silicon delivery with opt ...
3 days ago
The Physical Design team is looking for an experienced designer to work on VLSI projects in Bangalore/Hyderabad. · ...
23 hours ago
The job involves handling constraints bring-up for Func/DFT modes and having good constraints debugging skills. · ...
23 hours ago
+Skill - Physical Design (Power Estimation and Analysis) · +Strong power estimation and analysis lead · +Powe · r estimation of various subsystems such as CPU and XPU · and doing power roll-up at SoC level. · ...
2 days ago
Physical Design (PD) Synthesis for VLSI Industry. · ...
23 hours ago
Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions. · ...
2 weeks ago
Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions. The company enables organizations to unlock the full potential of modern AI by collaborating with hyperscalers and ecosystem partners. · ...
2 weeks ago