SRAM Memory Layout Engineer - Bengaluru, India - Samsung Semiconductor
Description
Hi ,
We are hiring Layout Engineers for different streams as follows. Kindly share your CV to
Layout JD / Requirements:
· Must have 3 + years of experience in SRAM / standard cell layout designs in advanced CMOS process.
· Should have expertise in multiple standard cell layout library developments.
· Should be able to perform standard cell layout development and physical verification activities for complex designs as per provided specifications.
· Should have expertise in layout area and routing optimization, design rules, yield and reliability issues.
· Good understanding of layout fundamentals i.e. Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc.
· Should have adequate knowledge of schematics, interface with circuit designer and CAD team.
· Understanding layout effects on the circuit such as speed, capacitance, power and area etc.,
· Excellent in problem-solving skills in solving area, power, performance and physical verification of custom layout.
Kindly share your CV to