Cpu Architect, Devices and Services, Silicon - Bengaluru, India - Google
Description
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering or equivalent practical experience
- 5 years of experience with CPU architecture and microarchitecture and subsystem integration at architectural and RTL levels
- Experience with Low power design with focus on Idle power management and DVFS
- Experience with ARM Architecture and CoreSight debug architecture
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science emphasizing on computer architecture
- Experience in advanced CPU techniques such as AI engines, branch predictors, IFU, LSU and advanced prefetching algorithms
- Experience with C/C++ and scripting languages (e.g., Python)
- Experience in ARM ISA, PPA, design, and microarchitecture
- Experience in CPU subsystem design for mobile based and wearable classes of SOCs
About the job:
Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves.
As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure.
You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing.
Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.
Responsibilities:
- Assess performance analysis infrastructure, which includes preparing workloads, developing performance models, and conducting performance and workload analysis
- Participate in Performance, Power, Area (PPA) tradeoff analysis for architecture and microarchitecture features
- Communicate analysis results in both qualitative and quantitative fashion to support major decisions
- Defining next generation Low power schemes for state of the art cores
- Work with the RTL team to correlate the performance model with the RTL. Define future roadmap features and performance requirements
We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status.
We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law.If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.
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