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Bengaluru

    Memory Layout Engineer - Bengaluru, India - Cyient

    Cyient
    Cyient background
    Engineering / Architecture
    Description
    Memory Layout Experience: 4 to 6 years


    Skills required:
    Hands-on Experience in top level memory Layout.
    Technode experience from 28nm -3nm
    Experience Using Cadence Virtuoso Layout Editor, Mentor Graphics Calibre, Verification Tool
    Performing various kinds of layouts, implementations from top-level, floor planning down to complex block level layouts.
    Knowledge of different layout techniques, understanding of critical constraints in the circuit to be taken care of in layout.
    Should have good knowledge in CMOS/FinFET Layout concepts, Device Physics, and Fabrication concepts.
    Perl and Shell Scripting (Preferred).

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