Anirudh Rajesh

I am an Electronics and Communication Engineering graduate with a strong interest in VLSI Design, Analog Layout, and Digital Hardware Development. I have hands-on experience working with FPGA platforms such as Artix-7 and Spartan-3, implementing projects including AES-128 encryption and 7-segment display systems.

Electronics and Communication Engineer with hands-on experience in VLSI Design, FPGA Development, and Physical Design flow from RTL to GDSII. Experienced in implementing digital systems using Verilog HDL and working on FPGA platforms such as Artix-7 and Spartan-3.

Worked on projects including AES-128 encryption implementation, 8-bit Ripple Carry Adder design, 6-digit 7-segment display controller, and Memory Design & Testing modules. Familiar with full ASIC design flow using OpenROAD, including synthesis, floorplanning, placement, routing, timing analysis, area and power reporting.

Knowledgeable in Analog Layout concepts, CMOS device fundamentals, RC extraction, and physical verification techniques. Comfortable working in Linux environments with scripting using Shell/Python/TCL.

Strong foundation in Digital Electronics, Analog Circuits, Semiconductor Physics, and Verification methodologies (UVM basics).

B.E. in Electronics and Communication Engineering with strong academic foundation in VLSI, Analog Circuits, Digital Design, and FPGA Development.