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    Design Engineer - Greater Bengaluru Area, India - Tessolve Semiconductor Pvt. Ltd.

    Tessolve Semiconductor Pvt. Ltd.
    Tessolve Semiconductor Pvt. Ltd. Greater Bengaluru Area, India

    1 week ago

    Default job background
    Engineering / Architecture
    Description
    Greetings From Tessolve Semiconductors.

    A widely leading core semiconductor company in world wide.

    HIRING.. TESSOLVE SEMICONDUCTORS PVT LTD

    DFT REUIREMENT – 2024

    Location – Malaysia, Bangalore, Canada

    Experience – 4+ years to 20+ years

    We're hiring highly skilled DFT Engineers for all the DFT Techniques (ATPG, SCAN, JTAG, MBIST).

    if you're good at any one or all the DFT techniques and looking for a Long-term Career growth opportunity in Leading Core Semiconductor company then it's right fit job to you.

    Kindly go through the below JD to understand more about the requirement & company

    Technical Skill set -Job Description - SOC DFT 3-5 years of industry experience in DFT domain

    • Strong understanding of Scan and ATPG fundamentals
    • Must have worked on at least 2~3 SOC
    • Should have worked in SOC SCAN with Mentor TK
    • Experience in design and verification of test control logic (TCU)
    • Should have expertise in pattern generation for different fault models, coverage analysis and improvement using Mentor Fastscan
    • Experience in gate level simulation; with and without timing
    • Should know Verilog/VHDL/Perl/TCL scripting
    Mixed Signal DFT Requirement Strong fundamental knowledge of DFT/DFD techniques

    • Strong fundamental knowledge on transistor level circuits with mixed signal/analog background
    • Experience in Logic Design, Verilog RTL, verification, and static timing analysis
    • Knowledge in fault modeling Stuckat, Transition, Path Delay and other advanced DFT models
    • Knowledge in JTAG, MBIST, Scan Compression, ATPG, Fault Simulation and atspeed testing
    • Experience with industry ATPG tools such as Synopsys Tetramax or Mentor Fastscan ATPG tools
    • Working knowledge in Perl preferred
    • Detail oriented with strong organizational, problem solving and communication skills
    SOC DFT - MID LEVEL SENIOR REQ Implementation and verification of DFT architecture and features

    • Scan/Jtag/boundary scan insertion and ATPG pattern generation
    • Memory BIST logic generation, implementation and verification
    • ATPG patterns verification with gate level simulation
    • Understanding of Design For Test methodologies and DFT verification experience (eg. IEEE1500, JTAG 1149.x, scan, memory BIST, ... etc)
    • Experience with Mentor testkompress and/or Synopsys Tetramax/DFTMAX
    • Experience with VCS simulation tool, Perl/Shell scripting and Verilog RTL design
    DFT LEAD REQUIREMENT Participate and drive SOC full Chip DFT feature and architecture definition

    • Responsible for DFT specification generation and review
    • Drive a team to implement SOC DFT functions including SCAN, Boundary SCAN, MBIST, Analog Macro test logic
    • Drive performance verification on all DFT structures
    • Generate and verify DFT structural patterns and functional patterns
    • BS in EE & CS. MS preferred, with 10+ years experience
    • Familiar with entire ASIC design flow
    • Experience with micro processor design a big plus
    • LI-DM1
    Interested can apply and Refer to your friends to support the connections.

    for more clarification

    Tessolve Semiconductors


    Tessolve Semiconductors a venture of Hero Electronix, part of $10B Hero Group companies a Design and Test Engineering Service Company providing End to End Solutions from Product Engineering, Software, Hardware, Wireless, Automotive and Embedded Solutions.

    We are Global Multi- National Company having Engineering and Sales presences in India, Malaysia, Singapore, USA, UK, Europe, and China.

    Tessolve has strategic and sustainable growth plan to ensure the business stability to our valued customers and to protect the career of our employees even under disturbed Business situations.


    Disclaimer:
    At Tessolve, we are committed to fostering a workplace that embraces and celebrates diversity in all its forms. We believe that diverse teams drive innovation, creativity, and success.

    We are dedicated to creating an inclusive environment where all employees, regardless of their race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status, feel valued and respected.

    We believe in fair and equitable treatment for all employees and aim to eliminate any biases or barriers that may hinder personal or professional growth.

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