- Design and development of Analog or Mixed signal macros in cutting edge process technologies: mostly in 16nm/28nm/finfet
- Various phases of Analog design: transistor level design, circuit simulation, parasitic extraction, post layout simulations and layouts.
- Design and integration of analog/mixed-signal circuits
- Most of the work will be on very high-speed design: 10/16 Gbps
- Understand the design of analog blocks used in PHY chips for high-speed communications: equalizer, PLL, CDR
- Experience with high frequency designs.
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Engineer Design
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Design Verification Engineer
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RTL Design Engineer
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Analog Design Engineer - Hyderabad, India - MosChip
Description
Job Title: Analog Design Engineer:
• Analog-to-digital converters (ADC)
• Digital-to-analog converters (DAC)
• Phase-Locked Loop (PLL)
• Adaptive equalizers, finite-impulse response (FIR) filter, and decision-feedback equalizer (DFE)
• Serializer-Deserializer (Serdes)
• Clock and data recovery (CDR) circuits
• Timing critical circuits
Designing high performance CMOS circuits in the following areas at a minimum:
• Bandgaps
• Regulators
• Bias circuits
• SCL circuits
• Amplifiers
• Oscillators
• DACs/ADCs
Experience in filters and/or equalization, including but not limited to continuous time filter, discrete-time filters, FIR filter, and DFE, SerDes and timing circuits such as PLL, CDR, TX and RX functions is a plus. Preferred candidate is MSEE or PHD in EE with technical management experience in CMOS analog/mixed-signal integrated circuit design. Fluent in various CAD tools for analog design from RTL to layout (including circuit design, physical layout, extraction of design and verification) is a MUST.
Key Description :
Experience – 3 to 8 Years
Location - Hyderabad.