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    Design Verification Engineer - Bangalore, India - VIPSA TALENT SOLUTIONS PRIVATE LIMITED

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    permanent Engineering / Architecture
    Description


    Requirement is for NOC Design Verification which includes but not limited to Design verification with low power intent/upf, uvm tb collaterals coding, test/sequence development, regressions/debugs, coverage coding/analysis, delivering key milestones as part of project executions.


    • Hands on experience in IP/Block level verification.
    • Hands on experience in Low Power Verification/UPF.
    • Experience in Clocking/Boot/Reset Flows.
    • Experience in System Verilog and UVM is a must.
    • Experience in ARM Protocols - AXI, AHB and CHI.
    • Familiarity with scripting languages like Perl, Python.

    Required Education :
    MTech/MS in Electronics

    Key Words:
    SV, UVM, UPF, ARM


    Roles & Responsibilities :

    • HW Design Verification role.
    • Responsibility will be to own an IP block verification which involves but not limited to
    a. Test/Sequence/constraints coding, test bench components coding, assertions/checkers, and coverage(functional, code) closure.

    b. Run simulations/regressions/cron, debug and analysis.
    )


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