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Verification Engineer
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Verification Engineer
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Verification Engineer
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Verification Engineer
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Verification Engineer
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verification Engineer
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Qualcomm Bangalore, India Paid WorkCompany: · Qualcomm India Private Limited · Job Area: · Engineering Group, Engineering Group > Hardware Engineering · General Summary: · As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital ...
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Verification Engineer
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Design Verification Engineer
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Design Verification Engineer
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Verification Validation Engineer
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Physical Verification Engineer
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Design Verification Engineer
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FPGA Verification Engineer
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AlphaGrep Bengaluru, IndiaAre you an experienced Digital Design Verification Engineer seeking a challenging role in the field of FPGA-based acceleration platforms? AlphaGrep Securities Private Limited is expanding its team and is in search of a talented Verification Engineer to join us in Mumbai or Bangal ...
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Functional Verification Engineer
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Consulting Bangalore, IndiaWe are hiring for the Functional Verification Engineer & details below. · Position : Functional Verification Engineer · Experience : 8+ Years · Location : Bangalore · Notice Period : Upto 90 Days. · Your Role and Responsibilities : · - As a Functional verification engineer, you w ...
Design Verification Engineer - Bengaluru, India - Tech Mahindra
Description
Hi FolksRole:
Design Verification
Exp: 8+
Location:
Bangalore / Kochi / Ahemdabad
About Job:
Design verification of IP-level, SoC -level and/or block-level/sub-system-level designs
Experience in developing verification plan/verification methodology/flows from scratch
Hands-on expertise with UMV (or similar) methodology, and Verilog/System Verilog (SV)
Experience in constraint-random verification and/or transaction-based verification
Experience in developing one or more of - monitors, sequencers, drivers, scoreboards, checkers, coverage analysis/metrics, coverage closure, assertions, VIP components etc.
Experience in one or more of the IPs like LPDDR-4&above, PCIE-Gen3&above, SATA, USB 3.0&above, Ethernet, DDR, NVMe, SDMM, MIPI etc.
Experience with on-chip protocols like AXI/AXI-Lite, AMBA/AHB/APB etc.Can understand clocking, reset architecture and data flows. Has knowledge of SoC bring-up, bus protocol, register and address map Verification
Experience with gate-level simulations - timing/no-timing, SDF annotation
Experience in low-power verification using UPF/CPF power intent flows is a plus
Strong scripting skills with C/C++/Perl/Python
Understanding of emulations platforms, S/W co-development, end-to-end verification
EDA Tools:
Industry standard tools from Synopsys, Cadence, Mentor etc.
To Apply:
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