- PhysicalDesign Planning: Collaborate with chip architects and logicdesigners to understand the design goals constraints andspecifications. Develop a physical design plan that outlines thesteps and resources needed for successfulimplementation.
- Floor planning: Create afloorplan that defines the placement of different functional blocksand components on the semiconductor die to optimize powerperformance and area (PPA).
- Placement: Placeand optimize logic cells memory elements and other IP blocks on thechip according to the floorplan. Balance tradeoffs between areatiming and power consumption.
- Clock TreeSynthesis (CTS): Design and implement clock distribution networksto ensure synchronized clock signals throughout the chip minimizingclock skew and jitter.
- Routing: Perform globaland detailed routing to connect all the components on the chipwhile adhering to design rules and manufacturability constraints.Timing Closure: Use static timing analysis tools to meet timingrequirements and ensure the chip operates at the desired clockfrequency.
- Power Optimization: Implementlowpower design techniques such as power gating voltage scaling andclock gating to reduce power consumption while maintainingperformance
- Physical Verification: Run designrule checking (DRC) and layout versus schematic (LVS) checks toensure the layout meets manufacturing and electrical integritystandards.
- Design for Manufacturing (DFM):Collaborate with manufacturing teams to optimize the design for thefabrication process considering issues like lithography yield andprocess variations.
- Tapeout: Prepare the finaldesign for fabrication by generating the required files anddocumentation. Coordinate with foundries fortapeout.
- PostSilicon Validation Support: Assistin postsilicon bringup and debugging if necessary to ensure thechip performs as expected.
- Documentation:Maintain detailed documentation of the design process methodologiesand any issues encountered for futurereference.
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Description
Qualifications:B.Tech/B.E/M.E/M.TechJob Location PANINDIAPreferred onlythose who have done Training or internship in PhysicalDesign.
JOBDESCRIPTION:
physicaldesign,static timing analysis,very-large-scale integration(vlsi)
