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    ASIC RTL Engineer - Hyderabad, India - MosChip

    MosChip
    MosChip Hyderabad, India

    6 days ago

    Default job background
    Description

    Position- ASIC RTL Engineer

    Exp- 5 to 12 years

    Location- Hyderabad and Bangalore

    Skill:-

    • Experience in Logic design / RTL coding is a must.
    • Experience is SoC design and integration for complex SoCs is a must.
    • Experience in Verilog/System-Verilog is a must.
    • Experience in Multi Clock designs, Asynchronous interface is a must.
    • Experience in using the tools in ASIC development such as Lint and CDC.
    • Experience in Synthesis / Understanding of timing concepts is a plus.
    • Experience in ECO fixes and formal verification.
    • Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset architecture.
    • Excellent oral and written communications skills.

    Proactive, creative, curious, motivated to learn and contribute with good collaboration

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