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    Senior Verification Engineer - Bengaluru, India - Microsoft

    Microsoft
    Microsoft Bengaluru, India

    Found in: Talent IN C2 - 2 days ago

    Microsoft background
    Full time
    Description

    Overview

    Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. The Silicon IP Architecture and Verification team is seeking passionate, driven, and intellectually curious silicon verification engineer who can work with cross-discipline teams (systems, firmware, architecture, design, validation, product engineering, ...) to develop environment and test cases to verify SOC designs. The ideal candidate is also passionate about developing systematic and efficient methods to detect hardware/software vulnerabilities.

    Our team is involved in numerous projects within Microsoft developing custom silicon for a diverse set of systems ranging from innovative high-performance consumer products like Xbox to Azure cloud servers, clients, and IoT SOCs.

    Qualifications

  • B.S. or higher in Computer Engineering, Electrical Engineering, or similar.
  • 8+ years of experience in developing test plans, creating simulation environments, developing tests, and debugging for multiple IPs, SoCs or systems.
  • Proficient in System Verilog, C/C++, and scripting languages such as Python, Ruby or Perl.

    • Requirements:

  • Experience in pre-silicon verification of blocks/sub systems and SoCs through full cycle
  • In depth knowledge of verification principles, testbenches, stimulus generation, coverage.
  • Substantial background in creating SV/UVM Test Benches, developing tests, debugging designs and closing coverage.
  • Solid understanding of chip and/or computer architecture
  • Experience writing tests in C/C++, System Verilog and UVM
  • Scripting language such as Python, Ruby, or Perl
  • Excellent communication skills
  • Energetic and self-motivated

    • Prior experience in the following would also be valuable:

  • Experience with PCIe/MIPI subsystems
  • Experience with the use of formal verification methods
  • Experience in RTL design for FPGA or emulation
  • Experience in Assembly, start-up code and linker scripts.
  • Experience in developing makefiles for software development.

    • #SCHIEINDIA

    Responsibilities

    The role will be responsible for creation of verification environments and tests, pre-silicon verification at the block, sub-system, and SoC levels – functional, stress, performance and application-level use cases, and SoC level Coverage

    Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.Industry leading healthcareEducational resourcesDiscounts on products and servicesSavings and investmentsMaternity and paternity leaveGenerous time awayGiving programsOpportunities to network and connect
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