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    Senior/Staff DFT Engineer - Bengaluru, India - Synopsys Inc

    Synopsys Inc
    Synopsys Inc Bengaluru, India

    12 hours ago

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    Description

    The Solutions engineer works in tandem with the product R&D and customer support teams in a project-oriented environment to deliver DFT Solutions ranging from Integration to Silicon Bring-up to customers designing digital ICs of varying complexity.

    The DFT Solutions engineer interacts with the customers/customer support Engineering team to assess their methodologies and flows, gather requirements, and propose solutions.

    The Solutions engineer is responsible for working with Solution Architects to develop and productize the next gen Test Technologies.

    The role would also involve prototyping new methodologies around memory BIST architecture implementations, analyze gathered data, identify the viability of technology, and present the findings under the guidance of a Solution Architect.


    Also, the Solutions engineer would also provide guidance to the customer support teams to win new customers through product demonstrations, evaluations, and competitive benchmarking.

    They must be able to interact effectively with end-users at customer sites, as well as with first level managers.

    Responsibilities include but not limited to the following:
    Provide expertise for test solutions during design planning/budgeting/implementing.

    MBIST new feature implementation and validation: BIST architecture planning, memory grouping, pattern generation and validation, silicon bring-up, diagnostics analysis and debug.

    Participation in customer's design and flow reviews.
    Drive, Prototype & Develop new Design for Test methodologies.

    Ability to multitask across many issues and priorities, and the desire to help customers exploit new technologies are essential for success in the position.

    Qualification

    BS+5 years of relevant experience/MS+3 years of relevant experience in Electrical Engineering or Computer Engineering or other relevant field of study.

    Experience in handling Memory BIST for large - complex SoC's having various IP's
    Experience with RTL Coding, Scan/ATPG/MBIST - Insertion, Validation, Pattern generation & silicon bring-up
    Exposure to Memory architecture, fault models, MBIST algorithms, hard/soft repair and efuse repair flow
    Good understanding of protocols like 1149.1, 1500, 1687
    Exposure to BCAM/TCAM/DDR/LPDDR memory testing would be a plus
    Exposure to MBIST of automotive designs would be a plus
    Excellent soft skills
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