- As a member in our team, you will be responsible for the design and implementation of state-of-the-art designs in test access mechanisms, IO BIST, memory BIST and scan compression.
- Your responsibility will also include verification and silicon bringup of Scan ATPG and other DFT features.
- In addition, you will help develop and deploy DFT methodologies for our next generation products.
- Be apart of innovation to strive improve the quality of DFT methods.
- You will also need to work with multi-functional teams to incorporate DFT features into the chip.
- Occasional travel and also some late hours online meetings involved during critical milestones.
- BSEE or MSEE from reputed institutions or equivalent experience.
- 3+ years of experience.
- You should be well versed with static timing Analysis, ECO, ASIC/Logic Design Flow, HDL and Digital logic design.
- Experience in RTL and Gates verification and simulation.
- You need to be familiar with BIST architecture and JTAG/IEEE1149.1/IEEE1500.
- Strong DFT knowledge in Scan ATPG, compression techniques and memory test.
- Strong analytical and problem solving skills.
- Expert coding skills in industry standard scripting languages.
- Extraordinary written and oral communication skills with the curiosity to work on rare challenges.
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DFT Engineer - bangalore, India - NVIDIA
Description
We are now looking for a DFT Engineer. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life's work , to amplify human imagination and intelligence. Make the choice to join us today. NVIDIA is an equal opportunity employer. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips.
What you'll be doing:
What we need to see: