- Minimum of 8 years of hands-on physical design implementation experience along with APR flow development and PPA analysis
- STA closure at block
- Experience in Advanced process technology nodes (6/7 nm preferred)
- Experience with Cadence layout tools ( Innovus, Tempus , etc..)
- Hands on work experience in Physical verification closure (DRC/LVS/Antenna) with Caliber tool
- Experience in closing all the IR issues within the block based on feedback
- Should be strong in fundamentals of digital electronics and microprocessors
- Should have very good analytical skills
- Required soft skills – English language proficiency, Good collaboration and interpersonal skills. Good analytical and Problem-solving skills along with strong ownership, commitment and time management.
- Bachelor's or Masters with a relevant education is in the field of electronics and computer architecture
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Staff Engineer - hyderabad, India - Micron
Description
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
JR54070 Staff Engineer - ASIC Physical DesignThe team member will typically work on processors, controller architectures or ASICs for Enterprise SSD Group. Should be proficient in block level low power aware floorplanning, placement, clock tree synthesis, routing, RC extraction, STA timing closure, IR/EM analysis, DRC/LVS/ERC and tape out activities.
Requirements
Preferred Skills:
·Strong verbal communication skills
·Cadence PnR tools
·Formal verification experience
·Digital electronics and microprocessors experience