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Senior Logic Design Engineer - Bengaluru, India - ConnectPro Management Consultants Pvt Ltd.
Description
Your Role and Responsibilities :
Lead the Architecture, Design and development of processor MMU (Memory management unit) for high-performance Systems.
Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physical design, FW, SW teams to develop the MMU feature enhancements.
- Signoff the Pre-silicon Design that meets all the functional, area and timing goals.
Required Education :
Bachelor's Degree Required Technical and Professional Expertise.
- 12+ years of relevant industry experience.
- At least 1 generation of experience in the memory management/ memory controller delivery leadership.
- Experience with NuCA / NuMA (Non-uniform Cache / Memory architecture) architectures and implementations.
- Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory.
- Good understanding of industry trends & advances in architecting high bandwidth memory solutions.
Key Responsibilities :
Lead Architecture and Design : Take ownership of defining the architecture and micro-architecture of the processor MMU. Develop detailed specifications and design RTL (Register Transfer Level) implementation.
Collaboration : Work closely with Verification, DFT, Physical Design, Firmware, and Software teams to ensure seamless integration of MMU features and enhancements.
Feature Enhancements : Continuously drive innovation and improvement in MMU functionality, performance, and efficiency. Identify opportunities for enhancement and optimization.
Pre-silicon Signoff : Take responsibility for signing off the pre-silicon design, ensuring it meets all functional, area, and timing requirements. Work closely with the Verification team to ensure comprehensive verification coverage.
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