- ASIC Design
- Verification
- Physical Design
- DFT
- Circuit Design & Layout
- FPGA Design and Emulation
- Total 8 to 18 years of experience with 8+ years of experience in analog layout design
- Affinity with the state of art analog layout development flow and tools, preferably with Cadence tooling
- Experience with AMS-RF physical implementation flow from floorplan to GDS including: Floorplan, placement, routing and verification (LVS, DRC and Antenna checks)
- Experience with both advanced nodes (FinFET Technologies, 5nm and 16nm) and mature nodes (28nm, 40nm and above)
- Good experience in and with Linux
- Autonomous and possessing debug/problemsolving skills.
- Work in a dynamic environment, with an international team and remote colleagues.
- Ability to learn quickly and work independently or as part of a team.
- Proficient in communicating and writing technical documentation in English.
- Experience in analog IP/layout design porting between technology nodes and/or foundries
- Capable to perform design rule checking, electrical rule checking and layout versus schematic checks and resolve errors
- Knowledge of Cadence SKILL coding language
- Data Management tool, such as DesignSync Dassault
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Analog Layout Design Lead - Delhi NCR/Noida, India - MY Search
Description
Our client is one of the fastest-growing semiconductor services company. They deliver end-to-end solutions of the best quality with the shortest development cycle to the global semiconductor industry.Our client's cutting edge solutions include :
Considered a plus: