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    Senior Design Verification Engineer - Bengaluru, India - Insemi Technology

    Insemi Technology
    Insemi Technology Bengaluru, India

    11 hours ago

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    Description

    Company Description :

    InSemi Technology Services Pvt. Ltd. , founded in 2013, is a design services company specializing in VLSI and embedded systems.

    With expertise in chip design and embedded domains, we provide engineering design services and bridge the gap between academia and industry. Our VLSI expertise includes memory compiler/custom IP, analog and standard cell design, and ASIC design/verification. Our embedded systems team focuses on complete product development and offers services in IoT, PCB design, product analysis, and software development.

    Role Description :

    This is a full-time role for a Senior Design Verification Engineer located in Bengaluru. As a Senior Design Verification Engineer, you will be responsible for formal verification, RTL design, computer architecture, functional verification, and debugging. You will work on-site and collaborate with the design team to ensure the verification and validation of complex designs.

    Qualifications :

    • Formal Verification, RTL Design, and Functional Verification skills.
    • Experience in computer architecture and debugging.
    • Strong analytical and problem-solving abilities.
    • Knowledge of verification methodologies and tools.
    • Excellent communication and collaboration skills.
    • Bachelor's degree in Electrical Engineering, Computer Science, or related field.
    • Experience in the semiconductor industry is a plus.
    Skills Required :
    • Formal Verification : Proficiency in formal verification techniques and tools to verify digital designs. RTL Design: Strong understanding and experience in Register Transfer Level (RTL) design, including coding in HDL (Hardware Description Language) such as Verilog or VHDL.
    • Functional Verification: Expertise in functional verification methodologies and tools to ensure the correctness of digital designs.
    • Computer Architecture: In-depth knowledge and understanding of computer architecture principles, including microarchitecture, instruction set architecture, and memory systems.
    • Debugging: Proven ability to debug complex digital designs and identify and resolve issues efficiently.
    • Analytical and Problem-Solving Abilities: Strong analytical skills to analyze design specifications, identify potential issues, and propose effective solutions.
    • Verification Methodologies: Familiarity with industry-standard verification methodologies such as UVM (Universal Verification Methodology) or OVM (Open Verification Methodology).
    • Verification Tools: Experience with verification tools such as Mentor Graphics Questa, Cadence Incisive, Synopsys VCS, or similar tools.
    • Scripting: Proficiency in scripting languages such as Python, Perl, or TCL to automate verification tasks and enhance productivity.
    • Communication: Excellent communication skills to collaborate effectively with cross-functional teams, document verification plans and results, and present findings to stakeholders.

    Responsibilities :

    • Develop and execute comprehensive verification plans to ensure the functional correctness of digital designs.
    • Utilize formal verification techniques to prove the correctness of design properties and cover critical corner cases.
    • Collaborate with RTL design teams to understand design specifications and identify verification requirements.
    • Implement and maintain verification environments using industry-standard methodologies and tools.
    • Develop and execute test cases to validate the functionality of digital designs and achieve high coverage metrics.
    • Debug failures, analyze root causes, and work closely with design teams to resolve issues in a timely manner.
    • Continuously improve verification methodologies, processes, and tools to enhance overall efficiency and effectiveness.
    • Stay updated with the latest advancements in verification technologies and methodologies and apply them to projects when applicable.
    • Mentor junior verification engineers and provide technical guidance and support as needed.
    • Communicate effectively with project stakeholders to provide regular updates on verification progress, issues, and risks.
    )
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