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    Platform Integration Engineer - hyderabad, India - Micron

    Micron
    Micron hyderabad, India

    5 days ago

    Micron background
    Description

    Our vision is to transform how the world uses information to enrich life for all.

    Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

    JR47045 Platform Integration Engineer - Low Power / Mobile Memory

    As an LPDRAM Platform Integration Engineer, you are expected to lead the product development team efforts in the Package development organization that is part of the global operations team. You will need a visionary approach to define the new product portfolios and new architectures that are being solicited by the TPM team from customers and Micron's internal Business units.

    Job Responsibilities:

  • Integrate the work between multiple teams under the Package org and interact with internal and external process integration teams with a goal to develop and qualify the new technology building blocks prior to the product IFR (initial feasibility request).
  • Define the project deliverables for the key stakeholders, map the schedule for development and support/facilitate weekly Platform integration meetings with a weekly update to the internal management.
  • Identify all potential technical risks at technology qualification gate that may show up in NPI stage for the new technology enablers.
  • Work closely with design and SIPI teams to define the best test vehicle for Package platform development.
  • Define the technology qualification plans and success criteria, as well as provide initial inputs for the design rules, dFMEA / pFMEA and control plan needed for package NPIs.

    • Requirement/Skills :

  • 1-2 years of experience in Semiconductor Package Industry or a New College Graduate (Masters or PhD) in Engineering field (Mechanical, Electrical, Chemical, Materials)
  • Strong communication skills, and good work ethics
  • A structured approach to problem solving.
  • Fundamental understanding of IC packaging design, materials and processes
  • Informative knowledge of industry trends in Advanced Packaging and working level knowledge in SIPI and PDN.
  • English language spoken and written comprehension.
  • Helping establish memory design window for various applications, by leveraging the x-functional team talent and architecting solution around various design trade-offs for memory design.
  • Understanding of the design impact and key package parameters that may affect the Eye diagram opening.
  • Understanding of Memory and Storage differences (DRAM vs NAND/NOR) in device level operation and key packaging challenges based on different applications.
  • Familiar with statistical approach in engineering and design of DOEs
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